SEMINAR

Combination of a Processor with a Reconfigurable Coprocessor

School of Mathematical Sciences
University of Southern Mississippi

ABSTRACT

In recent years, reconfigurable machines have been considered a break through in high performing computation. However, this kind of hardware is not always ideal as a general-purpose computational machine. Asal architecture combines a MC68030 Motorola processor with reconfigurable hardware to increase the performance. Using the capabilities of a fast processor connected to a programmable coprocessor overcomes some of the obstacles of typical reconfigurable machines. This architecture in many ways is similar to the Gart architecture, but with some modifications. General aspects of the architecture are presented, as well as an overview of the prototype software environment.

WHERE: TEC 251

WHEN(day): Friday, September 17th, 1999

WHEN(time): 2:00 PM

EVERYBODY IS INVITED